Mentor Graphics Adds Memory Models to Create Industry’s First Complete UVM SystemVerilog Verification IP Library

Mentor Graphics Corporation (NASDAQ: MENT) today announced availability of the first entirely native UVM SystemVerilog memory verification IP library for all commonly used memory devices, configurations, and interfaces. Mentor is adding over 1600 memory models to the Mentor® Verification IP (Mentor VIP) library that already supports over 60 commonly used peripheral interfaces and bus architectures. 

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